1. Field of the Invention
The present invention relates to a stacked structure of a semiconductor device and a method for stacking it, and, more particularly, to a stacked wafer structure and a method for stacking the wafer.
2. Description of Related Art
As the electronics industry flourishes, the semiconductor flat packaging techniques have reached their limit, and demand for miniaturization is met by product integration. Techniques for stacking wafers have become a new area of development, and the development is moving towards stacking of multiple homogeneous or heterogeneous wafers to achieve multi-functional purposes.
FIGS. 1A and 1B are schematic diagrams showing a method for manufacturing a wafer structure 1 according to the prior art. As shown in FIG. 1A, a plurality of dams 11 are formed on a substrate 10 made of silicon or glass, for example. Then, as shown in FIG. 1B, a wafer 12 is bonded onto the dams 11.
However, the surface of a normal wafer 12 is not flat, so air chambers P are formed between recesses 120 of the wafer 12 and the dams 11. When the subsequently packaging process is performed on the stacked wafer structure 1, the air trapped in the air chambers P will thermally expand like bubbles and push against the wafer 12, causing detachment and displacement of the wafer 12 from the dams 11, yielding defective products.
FIGS. 1A′ and 1B′ are schematic diagrams showing another method for manufacturing a stacked wafer structure 1′ according to the prior art. As shown, each dam 11′ has a plurality of through holes 110 running through the dam 11′ for protrusions 121 of the wafer 12 to be wedged therein, so that the recesses 120 of the wafer 12 can be abutted against the dam 11′, reinforcing the bonding strength between the wafer 12 and the dams 11′.
However, in the conventional stacked wafer structure 1′, since the dams 11′ are formed with through holes 110, so stress resulting from supporting the wafer 12 will concentrate around the walls of the through holes 110, and is not distributed. This makes the dams 11′ more likely to crack, and as a result, the wafer 12 may slant or come off and become defective.
Furthermore, since the through holes 110 run through the dams 11′, the through holes 110 is so deep that the protrusions 121 of the wafer cannot make contact with the substrate 10. This leaves too much space P′ in the through holes 110, and the air trapped inside these through holes 110 will thermally expand and push against the wafer 12 during subsequent manufacturing processes of the stacked wafer structure 1′.
Thus, there is an urgent need for a technique that solves the prior-art problems mentioned above.